Article View: comp.arch
Article #13443Re: varargs and register windows
From: howard
Date: Thu, 09 Apr 1987 00:24
Date: Thu, 09 Apr 1987 00:24
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3232 bytes
In article <6575@allegra.UUCP> kak@allegra.UUCP (Keith Kelleman) writes:
>How do machines with register windows, e.g. RISC I/II,
>handle variable length argument lists? RISC I has
>6 registers for incoming arguments (R26 - R31). What happens
>if the caller has more than 6 arguments?
You put them on a stack in main memory, just like with any other machine,
and they're about the speed you would expect. But this happens rarely,
so your average speed is close to pure register.
>Also, in C, its common practice to treat the passed arguments
>as memory, i.e. pointing at them with an (int *) and then using
>(++) to walk through them as an array.
>How does this work if the arguments are in registers?
All in all, the practice you refer to is unwise and very machine-dependent.
How do you know the arguments are stored in *ascending* order? But it is
possible to make a register-window machine behave exactly the same as a
non-register-window machine for this case. Here are some ways:
(1) Don't let it happen. The compiler can check whether an address of an
argument has been taken, and disallow putting any of them in registers.
Note that you can still put any argument marked "register" into a register,
because it is illegal to take the address of a register variable.
For separate compilation, the caller might not know that the callee is
doing this, so it might be up to the callee to take the register
args and copy them out to memory (yuck).
(2) Make the registers part of the memory address space, so that references
to certain addresses (those currently on-chip) are intercepted and
converted to register references. Then you can use pointers to write into
the callee's window (making sure it's free first!). A little unwieldy,
but probably faster than keeping the arguments off-chip (assuming you can
afford the hardware overhead). This is only slightly more difficult than
catching references in instruction n to a register that was written to by
instruction n-1 (and whose value in fact, due to your pipeline, hasn't
reached the destination register yet but is sitting somewhere else on the
chip) and forwarding the correct value as an operand.
--
Copyright (c) 1987 by Howard A. Landman. You may copy this material for any
non-commercial purpose as long as this notice is retained. You may also
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Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: arc1-ca.pugleaf.net!utzoo!utgpu!water!watnot!watmath!clyde!rutgers!ucla-cs!ames!ucbcad!ucbvax!decvax!decwrl!pyramid!oliveb!intelca!mipos3!cpocd2!howard From: howard@cpocd2.UUCP Newsgroups: comp.arch Subject: Re: varargs and register windows Message-ID: <567@cpocd2.UUCP> Date: Wed, 8-Apr-87 19:24:27 EST Article-I.D.: cpocd2.567 Posted: Wed Apr 8 19:24:27 1987 Date-Received: Sat, 11-Apr-87 11:34:28 EST References: <6575@allegra.UUCP> Reply-To: howard@cpocd2.UUCP (Howard A. Landman) Distribution: world Organization: Intel Corp. ASIC Services Organization, Chandler AZ Lines: 42