Article View: comp.arch
Article #1635Re: Compiling - RISC vs. CISC
From: John Mashey
Date: Sat, 22 Jul 1989 22:51
Date: Sat, 22 Jul 1989 22:51
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1671 bytes
In article <2231@oakhill.UUCP> davet@oakhill.UUCP (David Trissel) writes:
>But it seems to me that once you take into consideration the requirement that
>a RISC compiler has to support code reorder scheduling to produce decent
>output then the code reorderer must be every bit as complex as a 68K peephole
>optimizer (for example.) A reorderer has to keep up with live/dead
>registers, operand use/defines, have the knowledge of what can be swapped
>around to where etc. which is even more complex in many respects than what
>my 68K peephole is required to do.
How about publishing some data on the size and complexity of the
peephole for the 68K and the code reorderer for the 88K?
This would seem to be a useful data point, esp. if the rest of the
compiler system is similar. Also, estimates of staff-weeks to do this
would be really nice, to help start building an element of quantitative
data into this ongoing discussion.
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!wugate!wuarchive!brutus.cs.uiuc.edu!apple!vsi1!wyse!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Compiling - RISC vs. CISC Message-ID: <23868@winchester.mips.COM> Date: 22 Jul 89 22:51:39 GMT References: <13976@lanl.gov> <2190@oakhill.UUCP> <1989Jul9.202858.27121@jarvis.csri.toronto.edu> <2231@oakhill.UUCP> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 21