Article View: comp.arch
Article #1674Re: Making Rounding Modes Usable - We've Done That!
From: David Wolverton
Date: Thu, 27 Jul 1989 13:25
Date: Thu, 27 Jul 1989 13:25
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1685 bytes
In article <817@acorn.co.uk>, RWilson@acorn.co.uk writes: > Well us hardware folks (Acorn) have come to your rescue: the floating point > system for the Acorn RISC Machine (VLSI Technology VL86C010 and VL86C020) > provides the rounding modes as part of the instruction. ... > > One little thing: ARM based computers start at 649 pounds in the UK. And you > can't buy them in the states at all. Must be something in your culture > which doesn't want control over rounding modes :-)! > > --Roger Wilson Sorry to burst your bubble Roger, but the AT&T WE32206 Math Acceleration Unit chip provides BOTH modes AND per-instruction rounding. For instance, you could set the '206 to the "round to nearest" mode, then if necessary override the current mode for an instruction or two. I wrote an assembler for this chip that accepted an optional rounding mode suffix on each floating-point instruction. Thus, if "mfaddd" is a double-precision addition, "mfaddd.rz" forces the addition to be rounded to zero, regardless of the current rounding mode. This chip is in the newest AT&T 3B2 models, but I don't think the production assembler supports this feature of the WE32206. Dave Wolverton AT&T daw@attunix.att.com
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arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!bionet!agate!ucbvax!tut.cis.ohio-state.edu!att!cbnewsh!dawReferences:
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!bionet!agate!ucbvax!tut.cis.ohio-state.edu!att!cbnewsh!daw From: daw@cbnewsh.ATT.COM (David Wolverton) Newsgroups: comp.arch Subject: Re: Making Rounding Modes Usable - We've Done That! Summary: WE32206 does it too Message-ID: <2620@cbnewsh.ATT.COM> Date: 27 Jul 89 13:25:38 GMT References: <817@acorn.co.uk> Organization: AT&T Bell Labs, Holmdel, NJ Lines: 26