Re: FPU chip set

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Article #1732

#1732

From: Keith Bierman - SPD Languages Ma...
Date: Wed, 02 Aug 1989 18:03

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In article <GRUNWALD.89Jun17210544@flute.cs.uiuc.edu> grunwald@flute.cs.uiuc.edu writes:
>
>Now that there's an 80Mhz (I think it was) SPARC out, how is the Prisma
>chip going to find a market niche?

Prisma doesn't make chips. They build systems. As I understand it, it
will be a 4nsec (i.e. 250 native MIPS) IU, 100mflops (peak or
sustained ?) FPU up to 32 channel controllers, and other associated
goodies. So, if they can build and ship in sometime in the first half
of next year, it should give E&S, Convex, Alliant and Multiflow a run
for their money. 

>
>Will ted marry alice? 

No.

>And about about those aliens? 

Probably win the pennant race.

>God I love RISC.

:>

Keith H. Bierman      |*My thoughts are my own. Only my work belongs to Sun*
It's Not My Fault     |	Marketing Technical Specialist    ! kbierman@sun.com
I Voted for Bill &    |   Languages and Performance Tools. 
Opus  (* strange as it may seem, I do more engineering now     *)

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!watmath!att!pacbell!ames!apple!sun-barr!newstop!sun!chiba!khb
From: khb%chiba@Sun.COM (Keith Bierman - SPD Languages Marketing -- MTS)
Newsgroups: comp.arch
Subject: Re: FPU chip set
Message-ID: <119143@sun.Eng.Sun.COM>
Date: 2 Aug 89 18:03:01 GMT
References: <871@stag.UUCP> <GRUNWALD.89Jun17210544@flute.cs.uiuc.edu>
Sender: news@sun.Eng.Sun.COM
Reply-To: khb@sun.UUCP (Keith Bierman - SPD Languages Marketing -- MTS)
Organization: Sun Microsystems, Mountain View
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