Article View: comp.arch
Article #1856cache speed
From: Marcus S. Lewis
Date: Wed, 16 Aug 1989 22:33
Date: Wed, 16 Aug 1989 22:33
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1571 bytes
Dumb question time. (I hate when I'M asking the dumb questions)
A co-worker is building a "no compromise" performance-oriented '386
MSDOS machine. Aside from that obvious contradiction, I have a real
question and comp.arch is the only place I expect to get an answer.
How fast do the cache chips have to be on a 33MHz 386? For main memory,
I have always believed in the "reciprocal of the clock speed" rule for
chip speed, but the caches offered on the systems under consideration
are 15-20 ns chips. Now, I am informed by this same performance-
oriented person that the cache is all dual ported and thus has to run
twice as fast. I have seen a lot of discussion on multi-ported memory
here, with never a mention of what is required to pull this off.
I think what I want is a very brief tutorial on what it means to multi-
port memory. I know WHY, but I don't know HOW.
"Thank you for your support"
Marc
--
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arc1-ca.pugleaf.net!utzoo!attcan!uunet!tut.cis.ohio-state.edu!rutgers!netnews.upenn.edu!eecae!upba!dsndata!unocss!mlewisShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!tut.cis.ohio-state.edu!rutgers!netnews.upenn.edu!eecae!upba!dsndata!unocss!mlewis From: mlewis@unocss.UUCP (Marcus S. Lewis) Newsgroups: comp.arch Subject: cache speed Keywords: 80386 Message-ID: <1473@unocss.UUCP> Date: 16 Aug 89 22:33:05 GMT Organization: U. of Nebraska at Omaha Lines: 24