🚀 go-pugleaf

In article <231@ssp1.idca.tds.philips.nl> roelof@idca.tds.PHILIPS.nl (R. Vuurboom) writes:
| I've noticed that motorola has moved from instruction continuation
| (68010-30) to instruction restart (68040). So they no longer support
| virtual machines. (Must be the processors got tired of puking their
| insides all over the stack. :-)
| 
| I think some (all?) of the risc processors use instruction restart (mips if
| I remember correctly) so are we looking at the end of instruction continuation?

Well, when most (if not all) of the instructions execute in a single
cycle, instruction continuation and instruction restart look pretty
much the same.  Especially in a load/store architecture where there
are fewer instruction side-effects.

The 29K uses instruction restart for all instructions except for loads
and stores, which cannot be restarted (in the absolute sense) because
they execute in parallel with subsequent instructions. Instead, these
instructions are continued from on-chip state registers.  Loadm (Load
Multiple) and storem (Store Multiple) are continued from the last
completed transfer if interrupted.

I think you will find this mix of restart and continuation in many
processors which have simple instructions and parallel functional
units with out-of-order completion.

	-- Tim Olson
	Advanced Micro Devices
	(tim@amd.com)