Article View: comp.arch
Article #20284Looking for integrated microprocessor caches
From: Bruce Kleinman
Date: Tue, 14 Mar 1989 01:09
Date: Tue, 14 Mar 1989 01:09
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+------- | Can anyone suggest any prominent examples of microprocessors with integerated | caches that I have omitted from this list? | | Daniel R. Levy UNIX(R) mail: att!ttbcad!levy | AT&T Bell Laboratories +------- Perhaps my all-time-favorite processor ... CRISP. While it was never marketed commercially, it was - after all - developed at AT&T Bell Labs. CRISP includes a number of innovative features, among them a stack cache and a decoded instruction cache (there, I didn't call it a microcode cache). Bruce "rooting for CRISP, and then that whole SPARC thing started" Kleinman.
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arc1-ca.pugleaf.net!utzoo!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!hplabs!hplabsz!kleinmanReferences:
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!hplabs!hplabsz!kleinman From: kleinman@hplabsz.HPL.HP.COM (Bruce Kleinman) Newsgroups: comp.arch Subject: Looking for integrated microprocessor caches Message-ID: <3078@hplabsz.HPL.HP.COM> Date: 14 Mar 89 01:09:00 GMT References: <3257@ttrdc.UUCP> Reply-To: kleinman@hplabs.hp.com (Bruce Kleinman) Organization: Hewlett-Packard Labs, System Architecture Lab, Palo Alto, CA. Lines: 13