Article View: comp.arch
Article #20308Re: i860 CPU information
From: Mike Loving
Date: Wed, 15 Mar 1989 19:56
Date: Wed, 15 Mar 1989 19:56
24 lines
1785 bytes
1785 bytes
In article <15213@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
>In article <3024@alliant.Alliant.COM> jeff@alliant.Alliant.COM (Jeff Collins) writes:
>......
>>:There are policies that do not require this feature at all.
>....
>> Actually never mind that, how do you switch a process from one
>> processor to another (I don't count flushing the D-cache on
>> each context switch as a viable answer)?
>
>As I posted in <15016@winchester>, you have to flush the caches
>on context-switch in a single CPU, much less a multiprocessor.
A popular misconception. It is NOT necessary to flush the cache on a context
switch. If your cache is physically addressed and you do not include PIDs in
the tags, then yes you do have to. An example circumventing this is the new
HP machines which use a virtually addressed (no address xlat delay) cache and
do not flush the cache on context switches.
-------------------------------------------------------------------------------
Mike Loving loving@lanai.cs.ucla.edu
. . . {hplabs,ucbvax,uunet}!cs.ucla.edu!loving
-------------------------------------------------------------------------------
Technical Details
Message-ID:
<21795@shemp.CS.UCLA.EDU>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!oberon!ucla-cs!lovingReferences:
<1895@oakhill.UUCP> <21570@shemp.CS.UCLA.EDU> <3024@alliant.Alliant.COM> <15213@winchester.mips.COM> <706@m3.mfci.UUCP>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!oberon!ucla-cs!loving From: loving@lanai.cs.ucla.edu (Mike Loving) Newsgroups: comp.arch Subject: Re: i860 CPU information Keywords: i860 N10 Message-ID: <21795@shemp.CS.UCLA.EDU> Date: 15 Mar 89 19:56:27 GMT References: <1895@oakhill.UUCP> <21570@shemp.CS.UCLA.EDU> <3024@alliant.Alliant.COM> <15213@winchester.mips.COM> <706@m3.mfci.UUCP> Sender: news@CS.UCLA.EDU Reply-To: loving@cs.ucla.edu (Mike Loving) Distribution: usa Organization: UCLA Computer Science Department Lines: 24