🚀 go-pugleaf

John Mashey writes:

>This is NOT a populatr misconception.  If you have a "simple"
>virtual-addressed/virtual-tagged cache, i.e., as in the i860, with
>neither pids/asids, nor the (more complex) segment-style scheme of HP PA,
>then you will flush the caches on context switches, and you might do it
>more often, depending on the TLB/cache interactions, and how tricky the
>OS wants to get in deferring flushes.

>Physically-addressed caches don't need any flushes on context-switch
>or re-maps; you must have meant "If your cache is virtually addressed"
>-- 
>-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>

Just to set the record straight about HP PA, I'd like to make the following
observations:

1.  The "synonym" problem is usually not present.  Only the most privileged
    software can create a synonym situation, and it has the responsibility
    of managing the aliasing situations it creates.

2.  The "segment-style" scheme that John refers to actually alludes to the
    fact that all processes share the same global virtual address space but
    that individual processes are given their own SPACES (segments, if you want
    to think of them that way) for instructions and data except for when they
    share data (in which case, the virtual address is the same).  Specified
    in space registers, each space is 4 G Bytes long (in HP PA, there can be
    upto 4 G spaces).  The space portion of the address is a part of the
    virtual address which can be upto 64 bits wide.

3.  Since the caches are virtually indexed, this scheme prevents the
    occurrence of the synonym problem (no two virtual addresses will map to the
    same physical address) and therefore the need to sweep the caches on a
    context switch.

Viggy Mokkarala, Hewlett Packard Company
viggy@hpda.hp.com