🚀 go-pugleaf

In article <4387@pt.cs.cmu.edu> lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes:
>
>I don't agree: I see a lot of mileage to go. Back when the VAX came out,
>
>Of course, some things do hit brick walls: anyone remember cordwood?
>Compactrons? Magnetic logic? The coherer shaker?  Memory built out of
>core, plated wire, cryostats, thin-film, delay lines, or Williams tubes?
>

One of the bigwigs of MIPS was at the Caltech VLSI conference last week.
Sorry, I forogt his name and mynotes are at home. He predicts a likely
brick wall for RISC in the 1992-94 range somewhere. Until then, we can
expect RISC performance to roughly DOUBLE every year. What he said was
that he could see the advances coming down the pipe that would lead us
on until then. ASSUMING no further big changes, somewhere around there
 RISC performance will cease to double and begin speeding up at the 
standard technology driven rate: 15-20%/year. Of course, he's not saying
no more advances are coming down after that, in fact he hopes there
are, he just can't see them yet.

Alain Martain also talked about an ASYNCHRONOUS microprocessor he and
four grad students put together in five months: 18-20 MIPS. 16 bits,
no interrupts, just to keep it simple. More details available if
people are interested.

		--Rod
		  rod@ISI.Edu