🚀 go-pugleaf

In article <oYBLMhy00jaRA1ZlFZ@andrew.cmu.edu> pgc+@andrew.cmu.edu 
	(Paul G. Crumley) writes:
>For halfword accesses (both load and store) the LSB is silently forced
>to a zero and for word accesses the two LSBs are silently forced be
>zeroes.  Load and store instructions have no effect on the condition
>bits and no exceptions are generated when the lower order bit or bits
>are forced to zero.
>
>The RT/PC executes correct programs correctly.  I believe the silicon
>saved by the need for the shifters and more complex microcode was put
>to better use in a variety of ways.

You are probably right. However, when the RT/PC detects an incorrect
program, it performs actions that the programmer clearly did not
intend. In my previous posting, I argued that this leads to bugs which
are very hard to deal with. The amount of silicon required to raise an
interrupt is probably LESS THAN the amount required to zero the correct
number of address lines. The interrupt would make bugs much easier to
find, and the chip would be just as RISCish.
-- 
Don		D.C.Lindsay 	Carnegie Mellon School of Computer Science
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