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Article #20790

In search on the next generation standard bus

#20790
From: Casey Leedom
Date: Thu, 20 Apr 1989 20:37
78 lines
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  This is an issue which has bothered me for a long time.  On the one
hand we have a lot of manufacturers developing proprietary busses for
their various systems, and on the other we do have several standard
general purpose computer busses, but they're just too slow for the current
and next generation(s) of systems being developed.  I don't like the
proprietary busses because they lock customers into the manufacturers'
whims of production and pricing schedule, causing increased prices and
diluted product availability.  But to slave the new systems to the old
bus standards is senseless.

  Why aren't manufactures getting together to define a new general
purpose bus standard, or even a couple of them (ala memory, peripheral,
special control, hierarchal and chained)?

  It really wouldn't take that much effort.  The various manufacturers of
new systems are having to define new busses in any case.  All it would
take is for a few of these manufacturers to get together and hash out the
details of what's needed for the next generation standard bus.

  There are two possible followups to this letter: one on the technical
problems of defining such a new bus and the other on the political.  I'll
prime both subjects with a few thoughts:

TECHNICAL:
  [I hate news articles which start this way and you have every right to
flame me in public for this: My background in hardware is almost
non-existent.  Therefore the following list may contain absurdities and
obvious omissions.  This is just to get the ball rolling.]

  Any new bus standard should probably have at least the following
features:

	o Multiple busses/data-paths: memory, I/O, multi-cpu control and
	  communication.
	o The bus system should be capable of hierarchal/chained setup.
	  That is, you should be able to have multiple memory, I/O, etc.
	  busses as needed by the system being put together.
	o Bandwidth on memory and I/O busses should be in the hundreds of
	  megabytes per second.
	o Data and address lines should NOT be multiplexed.
	o Data and address paths should be very wide (probably 64 bits).
	o The bus needs to be simple enough that it doesn't make too many
	  assumptions about system configuration.  This will also make it
	  possible to design a cheap VLSI bus controller chip that can be
	  used to make it possible to design low cost products for the
	  bus.

POLITICAL:
  [Here I can offer much better experience having watched the computer
business for some time.]

  If you've watched the computer business in recent years you've probably
taken note of the patterns of success and failure for various lines and
individual products.  One of the most striking patterns in my mind is
that of open architecture systems versus closed: DEC UNIBUS & QBUS, S100
hobby bus, Apple II, IBM PC, XT and AT, VME, etc. on the open side were
almost instantaneous hits.  The ledger isn't 100% clear however with DEC
SBI and BI, Apple Macintosh, and a few other closed systems doing
extremely well.  But if memory serves me, the Apple Macintosh had an
uphill battle before it finally achieved the popularity it now enjoys.  I
don't have enough background with the DEC SBI and BI to comment on any
disadvantages they may have experienced because of closed designs - they
may well have succeeded simply because people were already locked into
the VAX architecture and needed more CPU ...

  In any case, there's a popular feeling among [some] manufacturers that
if they design their systems around proprietary architectures, then they
can get 100% of the resulting after market business and thereby achieve
better profits.  It's my contention that this is a false premise.  I
believe that if you design systems around open standards, you may not get
100% of the after market business, but because there will be so many
third party options available for your systems, the overall sales of your
system will more than make up for any percentage after market loss.

  This note is already too long, so I'll end it here.

Casey
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From: casey@lll-crg.llnl.gov (Casey Leedom)
Newsgroups: comp.arch
Subject: In search on the next generation standard bus
Keywords: high speed general purpose computer bus, open standards
Message-ID: <23938@lll-winken.LLNL.GOV>
Date: 20 Apr 89 20:37:15 GMT
Sender: usenet@lll-winken.LLNL.GOV
Reply-To: casey@lll-crg.llnl.gov (Casey Leedom)
Organization: Lawrence Livermore National Laboratory
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