Article View: comp.arch
Article #20867Re: Bandwidth and RISC vs. CISC
From: Gideon Yuval
Date: Sat, 22 Apr 1989 08:31
Date: Sat, 22 Apr 1989 08:31
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1361 bytes
My previous posting got garbled. Here's an ungarbled version.
Stan Lackey, in his message <38971@bbn.com>, says:
>I'd really like to see someone stand up and say, "Boy, the IEEE
>round-to-even is much more accurate than DEC's round .5 up. I have an
>application right here that proves it." Or, "Gradual underflow is
>much better. I have an application that can be run in single precision
>that would need to be run double precision without it."
The video-tapes of Kahan's "floating-point indoctrination" course (Sun,
May-Jul/88) have "somebody" (i.e. W.Kahan) standing up & saying precisely
that. Sneak a view if you can.
--
Gideon Yuval, yuval@taux01.nsc.com, +972-2-690992 (home) ,-52-522255(work)
Paper-mail: National Semiconductor, 6 Maskit St., Herzliyah, Israel
TWX: 33691, fax: +972-52-558322
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ukma!rex!ames!decwrl!nsc!taux01!yuval From: yuval@taux01.UUCP (Gideon Yuval) Newsgroups: comp.arch Subject: Re: Bandwidth and RISC vs. CISC Message-ID: <1569@taux01.UUCP> Date: 22 Apr 89 08:31:36 GMT References: <38853@bbn.COM> <423@bnr-fos.UUCP> <17417@cup.portal.com> <38971@bbn.COM> Reply-To: yuval@taux01.UUCP (Gideon Yuval) Organization: National Semiconductor (IC) Ltd, Israel Lines: 17