Re: One aspect of bandwidth (backplane bus)

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Article #20869

#20869

From: Henry Spencer
Date: Sat, 22 Apr 1989 22:52

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In article <17298@cup.portal.com> bcase@cup.portal.com (Brian bcase Case) writes:
>... all the (high-speed) main memory is "special," and is right next
>to the CPU/cache.  What do you do for multiprocessors? Build that ECL bus
>and charge several $million.

Or admit that global shared memory simply cannot be made fast enough for
such systems without several $million, and provide local memory for speed
with slower global memory for coordination only.  Potentially much more
of a hassle for the software, but still workable.
-- 
Mars in 1980s:  USSR, 2 tries, |     Henry Spencer at U of Toronto Zoology
2 failures; USA, 0 tries.      | uunet!attcan!utzoo!henry henry@zoo.toronto.edu

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Message-ID: <1989Apr22.225230.5585@utzoo.uucp>

Path: arc1-ca.pugleaf.net!utzoo!henry

References: <407@bnr-fos.UUCP> <17500@obiwan.mips.COM> <17527@winchester.mips.COM> <17298@cup.portal.com>

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Newsgroups: comp.arch
Path: arc1-ca.pugleaf.net!utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: One aspect of bandwidth (backplane bus)
Message-ID: <1989Apr22.225230.5585@utzoo.uucp>
Organization: U of Toronto Zoology
References: <407@bnr-fos.UUCP> <17500@obiwan.mips.COM> <17527@winchester.mips.COM> <17298@cup.portal.com>
Date: Sat, 22 Apr 89 22:52:30 GMT

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