🚀 go-pugleaf

In article <6628@cbmvax.UUCP> daveh@cbmvax.UUCP (Dave Haynie) writes:
....
>And both of these new guys have adopted techniques heretofore only associated
>with RISC chips.
ARGH!  This is popular in the press, but it's 100% wrong.  It's just like 
believing that the first computers were based on CPU chips [well, many people
do believe this, and in some sense, there's a little merit to it! :-)]
However, there is a long architectural history or doing the same kinds of things
in other architectures of mainframes and superminis, for at least 20 years.
Take a look inside an IBM or Amdahl mainframe, for example, or track the
evolution of the Prime '50 machines, or VAXen.  Some of these are easier or
harder than others, but the methods are well understood, and I'm sure that
the people doing the [486 or 040] architectures must surely understand this
history.
> ....I could be wrong, but I think the culmination of the varied
>RISC techniques really gives you one thing, when applied right -- a CPU that
>can be implemented in substantially fewer gates.  That's really all that
>matters.  Using the same basic techniques, a 1 micron CMOS 68040 could 
>probably go as fast (or thereabouts) as a 1 micron 88k or MIPS or whatever.
Well, we'll see!  Note that an interesting example will be to compare
the i486 and i860, since it is the BEST example I can think of being able
to compare architectures that use the same silicon process & CAD tools,
appear about the same time, use about the same die size, etc.
(PS, I don't think a 1micron 040 wil lbe as fast as a 1.2micron R3000.... :-)
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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