🚀 go-pugleaf

rpw3@amdcad.UUCP writes:
> A synchronizer tries to measure with absolute
> precision whether an energy (the "AND" of data and clock, typically) is above
> or below a threshold, and tries to do the measurement in a finite time. You
> can't do both. So that's the impossibility, at some very fundamental level.
> But most real synchronizers have failure rates far worse than the Heisenberg
> limit...

From your description, this doesn't seem to prove that metastability
is necessary.  If the state of a line is 0, and it asynchronously
changes to 1, a carefully designed synchronizer wouldn't mind if the
transition isn't noticed on the first succeeding clock edge.  Rather,
it would want either a clean 0 or a clean 1.  If the line stays 1, it
would definitely want to see a clean 1 by the next edge.  Notice that
a consequence of this is that asynchronous pulses shorter than one
clock period are not guaranteed to be noticed.  Of course, if you want
to catch short pulses, you would put a pulse catcher in front of the
synchronizer.

What your 'uncertainty' explanation seems to imply is that it is
impossible for a synchronizer to always give the right answer - e.g.
that it might say zero when it should say 1.  This would seem to be a
fatal flaw unless you confine the errors to be on transitions only (as
I explained above).  I think most systems can be designed to handle a
one-cycle delay in noticing _valid_ transitions.  What they can't
handle is invalid logic levels, which may result from metastable
states.

Of course, since I haven't read the paper you referenced, I can't
tell if it covers this situation.  Would you post more detailed
references?  Is the Cheney paper you refer to actually:
Chaney, T. J., Littlefield, W.M., and Ornstein, S.M. "Beware the
Synchronizer," in Digest of Papers of the Sixth Annual IEEE Computer
Society International "Conference, San Francisco, CA Sept 1972?  It's
referenced in Fletcher.

If anyone out there would like a simple explanation of why
metastable states occur when flip-flops are used as synchronizers,
see:

Hodges and Jackson, "Analysis and Design of Digital Integrated
Circuits," McGraw-Hill 1983

--Ed
-- 


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