Article View: comp.arch
Article #20988Re: Criteria for comparing RISC processors
From: John Mashey
Date: Tue, 02 May 1989 11:03
Date: Tue, 02 May 1989 11:03
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2674 bytes
In article <147@dg.dg.com> rec@dg.UUCP (Robert Cousins) writes:
.....
>Actually, not quite. If these features are being retrofitted into
>a system, yes, it can take a long time. If, however, the plan is
>to support these from the outset, the learning curve is not so steep.
Yep, I guess we msut have been dumb, as we planned for this stuff
from day 1, and it still took us a while...:-)
>
>The OCS is a seperate document with specific hooks for Ada, PL/I, etc.
>It deals with not only the extended/nested symbol table issues but also
>attempts to deal with the other known problems as mentioned by all of the
>88/Open members. The collective experience and knowledge of the 88/Open
>group is substantial.
Is this a published document?
>
>on compilers from day one. I believe that it is clear, that this
>competitive situation, with a published standard as reference, has resulted
>in excellent compilers, very quickly. Note that compilers for the 88K
>produce code RIGHT NOW with performance (Mhz for Mhz) equal to the MIPS
-----------------------------^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>compiler, which has been in development for years.
The statement above is a) clear, b) definite, and c) VERY strong.
Unlike much of the rest of the discussion (process X is better than
process Y for getting compilers), this statement is at least testable.
How about publishing some DATA to back this up?
1) Realistic integer programs would be good. (If Dhrystone
is cited instead, at least show us the strcpy part so we know
ifthe GreenHills strcpy inliner is being used.)
2) Realistic floating point programs would be of particular
interest..... it will be interesting, for example, to see
if the Spice or Doduc numbers from a 20MHz 88K beat a
16.7MHz M/120, or RC2030, or DECstation 3100, for example....
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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<2368@ogccse.ogc.edu> <1464@cfa.cfa.harvard.EDU> <141@dg.dg.com> <18120@winchester.mips.COM> <144@dg.dg.com> <18316@winchester.mips.COM> <147@dg.dg.com>Show Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!rutgers!mit-eddie!bbn!apple!vsi1!wyse!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Criteria for comparing RISC processors Message-ID: <18653@winchester.mips.COM> Date: 2 May 89 11:03:04 GMT References: <2368@ogccse.ogc.edu> <1464@cfa.cfa.harvard.EDU> <141@dg.dg.com> <18120@winchester.mips.COM> <144@dg.dg.com> <18316@winchester.mips.COM> <147@dg.dg.com> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 40