🚀 go-pugleaf

In article <10544@cit-vax.Caltech.Edu> (Yair Zadik) writes:
|WISC for Writeable Instruction Set Computer.  The idea ...

In article <1827@ccncsu.ColoState.EDU> (Jon Buller) writes:
|   The only problem with this is that doing a context switch is nearly
|   impossible.  Imagine not only saving registers but having to swap
|   out microcode and instructions too.    ...

In 9690 ted@nmsu.edu (Ted Dunning) sez:
|isn't this leading right back to a normal risc with a cache that
|allows programs to share executable segments?  

	Actually, no.
	The point is that micro-code is much more static over the life
	of a process.  A seperate cache of already-broken-down,
	easy to execute micro-code would be carrying RISC to an
	extreme (simple instructions), but would get around the
	icache/bandwidth problem inherent in conventional RISCs.
	

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\. ./  | Chris (The Lab Rat) Quenelle      cquenel@polyslo.calpoly.edu |  \. ./
 \ /   |  You can keep my things, they've come to take me home -- PG   |   \ / 
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