🚀 go-pugleaf

In article <1432@atanasoff.cs.iastate.edu> hascall@atanasoff.cs.iastate.edu.UUCP (John Hascall) writes:

>     I was thinking about filling the the delay slot behind
>     a delayed branch and wondered if there has been any
>     work/research/thought/implementations that put the
>     branch instruction BEFORE the instruction that sets
>     the condition codes for the branch.  For example:
>
>         AGAIN:   JSUB   FOO_RTN        ; return FOO in R0
>                  BEQL   AGAIN          ; try again if we
>		  TEST   R0             ;   get zero back
>		  JSUB   BAR_RTN        ; turn the FOO into a BAR

>     Although not without complications, it would seem an
>     excellent way to have a high branch delay slot fill ratio.
>     Comments?  Flames?

The issue is doing the test far enough in advance of the conditional
branch that the branch can use the results without stalls.
Most machines can set condition codes in one instruction and do a
conditional branch in the next following instruction.  Some machines
can do a compare-and-branch in one instruction.  No machine I've ever
seen can do a stall-free conditional branch based on the
results of the instruction after the branch!
Put another way: as much as computer architects would like
pipestages whose results are available in advance of their execution,
such things are only found in science-fiction...... (Perhaps people
recall the old Thiotmoline(sp?) stories in Analog? T... was a chemical
that showed a reaction a few seconds BEFORE you poured water in it...
These are like -5ns SRAMs, a commodity long sought after by
designers.)
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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