Article View: comp.arch
Article #21117Re: Message queues
From: Frank Hildebrandt
Date: Mon, 08 May 1989 09:26
Date: Mon, 08 May 1989 09:26
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In article <279@celit.UUCP> hutch@celerity.UUCP (Jim Hutchison) writes:
>Has anyone seen/heard of an architecture which aided kernel message passing by
>supplying hardware message queues for *fast* message queueing and dequeueing?
Maybe you want to take a look into
Ramachandran, U., Solomon, M.: "Hardware Support for Interprocess Communication"
Comp. Arch. News, Vol. 15, No. 2, June 87, pp 178-188
or
Ramachandran, U.: "Hardware Support for Interprocess Communication",
Ph.D.Thesis, Technical Report #667, Comp.Sc.Dept., U of Wisconsin, Madison,
September 86
Greetings, Frank.
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Frank Hildebrandt, TU Braunschweig, Inst. f. Betriebssysteme und Rechnerverbund
Postfach 3329, D-3300 Braunschweig, West Germany. Tel.: +49 531 391 3292
email: hild@infbs.UUCP hild@dbsinf6.BITNET
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!hc!lll-winken!uunet!mcvax!unido!infbs!hild From: hild@infbs.UUCP (Frank Hildebrandt) Newsgroups: comp.arch Subject: Re: Message queues Message-ID: <1202@infbs.UUCP> Date: 8 May 89 09:26:41 GMT References: <279@celit.UUCP> Reply-To: hild@infbs.UUCP (Frank Hildebrandt) Organization: TU Braunschweig,Informatik,West Germany Lines: 21