🚀 go-pugleaf

In article <13821@steinmetz.ge.com> davidsen@crdos1.UUCP (bill davidsen) writes:
+---------------
| In article <28200315@mcdurb> aglew@mcdurb.Urbana.Gould.COM writes:
| | Now you're talking!!!  Lots of pins give us multiple ports - now how do we
| | use them?
|   Let's look back a few years... the GE600 mainframes had eight port
| memory controllers. You could connect any combination of CPU's and I/O
| controllers (doing DMA) as long as you had at least one of each...
+---------------

The earliest PDP-10 memories (MA10, MB10, etc.) also had 8 ports. And you
could interleave up to 4-way by flipping switches in the memories. [Better
get the interleaving the same on all ports!] Of course, you only got 16K
36-bit words in each 30-inch-wide 6-foot-tall cabinet. ;-}  (Oh, yeah, the
later MD10 gave you 64K words per box. Big improvement... ;-}  )

But as you noted, the cabling was *monstrous*! Each set of cables was about
the same size/thickness as a set of IBM bus/tag cables. So a loaded memory
had 8 sets in, and of course, 8 sets daisy-chained out...

We could really use multi-port memory chips *today*! For example, in building
100 Mb/s FDDI node controllers (or for the upcoming gigabit rates) I'd really
like to have (at least) triple-ported memory capable of ~800 Mb/s bursts
on all three ports at the same time [the net, the host bus, and the node CPU].
The serial shift register of a video RAM doesn't take up all that much space;
you should be able to add a couple more. As it is, today's VRAMs really don't
cut it if you're trying to "stream" data from the host to/from the net -- the
normal RAM port doesn't have enough bandwidth to use the VRAM as a general FIFO,
and besides, you end up having to do lots of copying on the controller board,
and we all *know* about copying, don't we... ;-}  [VRAMs with just *two* serial
ports plus the normal RAM port would be a big help, but I'd still like three
burst ports...]


Rob Warnock
Systems Architecture Consultant

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