Article View: comp.arch
Article #21457TISC processor (not a joke, but not real either)
From: Mark Robert Thorson
Date: Thu, 25 May 1989 04:03
Date: Thu, 25 May 1989 04:03
11 lines
1038 bytes
1038 bytes
The recent joke postings on SISC (Single Instruction Set Computers) remind me that I once heard the minimum instruction set of a computer is two: INC and BEQ. Of course, this assumes wraparound of the integer number space. Even with only two instructions, you can't quite use a single bit instruction word length, because both of these instructions take an absolute address as an argument. Along the same lines, I mentioned in sci.electronics that the Signetics 8X300 has a particularly sparse instruction set: only one arithmetic instruction, ADD, and two logicals, AND and XOR. You're expected to derive all the rest (e.g. INC, DEC, SUB, NEG, OR, COM) from these three.
Technical Details
Message-ID:
<18777@cup.portal.com>Path:
arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!portal!cup.portal.com!mmmShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!portal!cup.portal.com!mmm From: mmm@cup.portal.com (Mark Robert Thorson) Newsgroups: comp.arch Subject: TISC processor (not a joke, but not real either) Message-ID: <18777@cup.portal.com> Date: 25 May 89 04:03:43 GMT Organization: The Portal System (TM) Lines: 11