🚀 go-pugleaf

In article <20752@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
>In article <125@ssp1.idca.tds.philips.nl> roelof@idca.tds.PHILIPS.nl (R. Vuurboom) writes:
>
>>The E2000 CPU runs at around 15-16 VAX mips sustained.
>Any chance you (or anybody) could post any benchmarks? This is of architectural
>interest, as I note, because it makes an interesting comparison of
>different implementation approaches of the same architecture.
>
We're still twiddling around with one or two things in the OS to notch up
performance so it'll be a while yet before we've got really proper 
benchmark results. Even then we don't expect to stray too much outside of
the given range.
Anyway some (but not all) of the marketing people breathing down our necks
consider "faster than the previous model" to be a perfectly adequate
performance description :-).

>>The machine can currently support 96Mb physical memory (4 triple Euro
>Must be 128MB!
>>32 Mbyte boards) but can be configured to 1 Gbyte physical memory when
>>the (4M) chips become available.

Yes. My desk calculator confirms 4x32=128 and my doctor confirms slight
brain damage.

>Note that this is one of the first extant examples of building a more
>powerful top end beyond a widespread VLSI micro architecture.
>
>This is in interesting trend, which is just the opposite of earlier efforts,
>i.e., people have often done VLSI CMOS versions of earlier
>supermini & mainframe architectures.  

But perhaps not a surprising trend. 
Even though an existing (cisc) architecture may not be able to offer the same 
performance as a newer (risc) architecture (using same real estate and process 
technology etc) it obviously can still be economically viable providing the 
existing (cisc) architecture represents compatibility (with  previous models).

With a little back-of-the-enveloping we might even be able to roughly
quantify this.

We estimate that in order to satisfy customer needs we should be looking
at a perfomance doubling every 2 years or a factor of about 1.4 every
year. This is like inflation. In other words, a 10 Mips machine available
now offers the "same" performance (value form money) as a 14 Mips machine 
available over 1 year or a 12 Mips machine available over 6 months.

In order to switch to a new processor in an existing environment, new tools
(compilers,assemblers) and possibly a few new techniques (understanding
code rearrangement for delay slot filling for example) must be mastered.
Also various assembly files need to be rewritten. I estimate this (one
time) extra developement effort and learning curve at 6 months extra lead
time. Now what this means in the above calculation is that in our current
development environment a 10 Mips compatible processor is equivalent to
a 12 Mips incompatible one due to the extra lead time.

There are of course other factors which stack in the favour of the
existing architecture:

	- easier customer field upgradability, often as not the customer
	  is willing to spend the money but not the time to upgrade.
	  If s/he needs to recompile the motivation is that much less.
	  Which means the existing machine will be replaced later
	  rather than earlier.

	- the learning curve in the organization costs time. These costs
	  are generally hidden however. 

	- the availability of the machine is later possibly resulting
	  in fewer total sales and thus a smaller recoup on investment.

I'm talking intuitively but I'ld say that these effects at least double 
the effect of the longer lead time. In other words, an incompatible processor
would have to offer at least 40-50% more performance for the same price before
you even to start to think about a change over (in an environment like ours).

Before I get flamed this is my estimate for our environment in which we
have knowledge/hardware invested in an existing processor. Other environments
may differ radically obviously if little existing knowledge/hardware is
available. However I do think our environment is not atypical for those
environments with existing models.

Put another way if the existing (backwards compatible) cisc architecture 
implemenations can offer 60-70% of the performance of the newer risc 
architecture implementations for the same price they may be around for a while.


Disclaimer: Opinions are my own, for my employers you pay extra.

	
-- 
Roelof Vuurboom  SSP/V3   Philips TDS Apeldoorn, The Netherlands   +31 55 432226
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