Article View: comp.arch
Article #2154Re: Parity in Internal Data Paths of Processors
From: Allen J. Baum
Date: Fri, 08 Sep 1989 18:40
Date: Fri, 08 Sep 1989 18:40
21 lines
1433 bytes
1433 bytes
[]
>In article <124311@sun.Eng.Sun.COM> kum@sccmts.Sun.COM (Kumar Venkatasubramaniam) writes:
>
>I am looking for information on the use of parity for error
>detection in large systems. Apart from the obvious use in
>detecting errors in memory data and errors in long buses
>susceptible to noise, does anyone know of parity being
>carried through the internal paths of a processor?
I think that most of the large IBM mainframes have parity on registers and
data-paths, but I dont have strong information. Carrying parity through the
ALU is a bit tougher, expecially for shifters. There was a set of bit-slice
ECL parts made by Motorola (originally designed for Univac, I think), that
had such things as "parity of internal carries", which could be used to do
just that. [ P(a) ^ P(b) ^ P(carries) = P(a+b) ] Parity of logic operations
is just a little trickier- you need to generate the operation, and its
'deMorgan equivalent', so P(a) ^ P(b) = P(a&b) ^ P(a|b)
--
baum@apple.com (408)974-3385
{decwrl,hplabs}!amdahl!apple!baum
Technical Details
Message-ID:
<34595@apple.Apple.COM>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!baumReferences:
<124311@sun.Eng.Sun.COM>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!baum From: baum@Apple.COM (Allen J. Baum) Newsgroups: comp.arch Subject: Re: Parity in Internal Data Paths of Processors Message-ID: <34595@apple.Apple.COM> Date: 8 Sep 89 18:40:18 GMT References: <124311@sun.Eng.Sun.COM> Reply-To: baum@apple.UUCP (Allen Baum) Organization: Apple Computer, Inc. Lines: 21