🚀 go-pugleaf

In article <21962@cup.portal.com>, cliffhanger@cup.portal.com (Cliff C Heyer) writes:
> Feel free to ax the following.
OK. Just a few editorial corrections on the "facts."
> "Mainframe I/O" where you have 100+ channels 
> cooking at 3MB/sec does not mesh with a 
> timesharing-type OS.
> 
Check Amdahl's UTS for a counter-example.
> ALSO keep on mind the the alleged "100+ MIPS" 
> processors are actually multiprocessors. The IBM 
> 3090-600 has 6 15 MIPS processors.
Uniprocessor performance is over 20 MIPS.  But be careful.
This same processor would run more like 40-60 MIPS with
a Unix system that has a good compiler. The reason
for the difference is the relatively poor locality of reference
encountered in an MVS environment, causing many more cache misses,
and the fact that most of the code has had no attention paid to
pipeline scheduling.
(Oversimplification).
> IBM's max uniprocessor MIPS is about the same as 
> others in the industry.  
Amdahl's uniprocessor MIPS are more than 50% higher than IBMs. We achieve
more throughput with four CPUs than IBM does with 6.
> 
> You might wonder how IBM keeps it's memory 
> subsystem fast enough to keep up with it's 15 MIPS 
> processors. They do it the brute force way. Use 
> expensive 3ns ECL cache and 512MB of 50ns SRAM 
> main memory to run at a cool 10ns cycle time or 
> 100MHz.
Actually Amdahl runs at 10ns. IBM's cycle time is (I think) 15 ns.
-- 
Mike Taylor                               ...!{hplabs,amdcad,sun}!amdahl!mat

[ This may not reflect my opinion, let alone anyone else's.  ]