Article View: comp.arch
Article #21645Re: VAX Architecture (Was: Re: Slandering Intel)
From: William Davidsen
Date: Thu, 08 Jun 1989 15:53
Date: Thu, 08 Jun 1989 15:53
17 lines
1441 bytes
1441 bytes
In article <3474@kalliope.rice.edu> preston@titan.rice.edu (Preston Briggs) writes:
| or ``Awesome 8x86 optimizing compiler technology'' ??
| Are there any useful optimizations possible on an 8086?
All the same stuff as any other CPU... taking things out of loops,
common subexpressions (push and pop are faster than recalc for many
things, other than simple register to register ops.
One big win is loop unrolling (the Duff device works really well on an
80x6) because of the prefetch queue. Loops pay a penalty of restarting
the queue, while inline code runs full speed, in many cases, even on a
machine with slow memory and wait states. The [23]86 fetch more bytes
and therefore have fewer memory accesses/byte.
bill davidsen (davidsen@crdos1.crd.GE.COM)
{uunet | philabs}!crdgw1!crdos1!davidsen
"Stupidity, like virtue, is its own reward" -me
Technical Details
Message-ID:
<686@crdgw1.crd.ge.com>Path:
arc1-ca.pugleaf.net!utzoo!attcan!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!uunet!crdgw1!sungod!davidsenReferences:
<76700071@p.cs.uiuc.edu> <3335@cps3xx.UUCP> <3474@kalliope.rice.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!uunet!crdgw1!sungod!davidsen From: davidsen@sungod.crd.ge.com (William Davidsen) Newsgroups: comp.arch Subject: Re: VAX Architecture (Was: Re: Slandering Intel) Message-ID: <686@crdgw1.crd.ge.com> Date: 8 Jun 89 15:53:06 GMT References: <76700071@p.cs.uiuc.edu> <3335@cps3xx.UUCP> <3474@kalliope.rice.edu> Sender: news@crdgw1.crd.ge.com Reply-To: davidsen@crdos1.UUCP (bill davidsen) Organization: General Electric Corp. R&D, Schenectady, NY Lines: 17