Article View: comp.arch
Article #21668Re: VAX Architecture (Was: Re: Slandering Intel)
From: Brian bcase Case
Date: Thu, 08 Jun 1989 17:13
Date: Thu, 08 Jun 1989 17:13
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>$ When there is failure (Multics, VAX architecture, i8086) it causes > >Out of curiousity, and not trying to start a new religious war, what >about the VAX architecture do you consider a failure? I'm not the original poster, but .... The VAX is certainly not a commercial failure. However, its instruction encodings are an abomination because they force a serial instruction decode. If it takes 3 cycles just to decode an instruction, your only chance of achieving high performance is to speed up the clock. But if you can speed up the clock, then a machine with easier instruction decode will beat you.... Someday DEC will implement a parallel instruction decoder along the lines of the one used in the 486 (but much more complex). Then they will be able to lower the CPI of the VAX. However, everyone else will use the implementation resources for more productive features....
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!cs.utexas.edu!uunet!portal!cup.portal.com!bcase From: bcase@cup.portal.com (Brian bcase Case) Newsgroups: comp.arch Subject: Re: VAX Architecture (Was: Re: Slandering Intel) Message-ID: <19255@cup.portal.com> Date: 8 Jun 89 17:13:05 GMT References: <76700071@p.cs.uiuc.edu> <3335@cps3xx.UUCP> Organization: The Portal System (TM) Lines: 16