Article View: comp.arch
Article #21751Re: Pipelined FP add
From: Stan Lackey
Date: Fri, 15 Dec 1989 18:01
Date: Fri, 15 Dec 1989 18:01
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In article <38132@ames.arc.nasa.gov> lamaster@ames.arc.nasa.gov (Hugh LaMaster) writes: >In article <3740@brazos.Rice.edu> preston@titan.rice.edu (Preston Briggs) writes: >>In particular, I prefer seperate FP and integer register sets. > >There are alternatives. For example, instead of creating >separate register files to increase the available ports, there is a >technique to use two identical register files for the same purpose. It's also possible to build the register file with both multiple read and multiple write ports. I'm pretty sure the Multiflow Trace has this. It's expensive, especially for multiple write ports, but it can certainly be done; there is basically a mux in front of each bit. I'd be surprised if any of the fast RISC's have less than two read ports, in fact. -Stan
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!bbn!bbn.com!slackey From: slackey@bbn.com (Stan Lackey) Newsgroups: comp.arch Subject: Re: Pipelined FP add Message-ID: <49784@bbn.COM> Date: 15 Dec 89 18:01:57 GMT References: <241@dg.dg.com> <33570@hal.mips.COM> <3740@brazos.Rice.edu> <38132@ames.arc.nasa.gov> Sender: news@bbn.COM Reply-To: slackey@BBN.COM (Stan Lackey) Distribution: na Organization: Bolt Beranek and Newman Inc., Cambridge MA Lines: 14