Article View: comp.arch
Article #21831Re: Cellular Automata Processors
From: Mark Robert Thorson
Date: Wed, 27 Dec 1989 06:20
Date: Wed, 27 Dec 1989 06:20
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928 bytes
Excuse me for a small error in my previous posting, which you might see AFTER this one due to the way the net works. I said that my quick sketch of simple low-cost cellular automata processor would execute wireworld at a rate of 8 Mcells/sec. I meant 32 Mcell/sec. The figure of 1000 generations/sec for a 6502-like wireworld CPU + RAM + ROM assumes that an average of 32,000 cells will be non-background and within the neighborhood of a cell that changed during the previous generation. (It's good to keep in mind that in the 1940's, ENIAC was criticized for having too little memory.)
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!portal!cup.portal.com!mmm From: mmm@cup.portal.com (Mark Robert Thorson) Newsgroups: comp.arch Subject: Re: Cellular Automata Processors Message-ID: <25409@cup.portal.com> Date: 27 Dec 89 06:20:13 GMT Organization: The Portal System (TM) Lines: 12