🚀 go-pugleaf

In article <435@berlioz.nsc.com> andrew@dtg.nsc.com (Andrew Palfreyman) writes:
  >
  >I am reading this thread with interest, and would like to see some realistic
  >numbers on SPARC performance. How does it perform on, say, a large CAD
  >package compared with the Sun-3? - does anyone have any benchmark results?
  >

One large CAD package is "SPICE2G6" from U.C. Berkeley.  It's a circuit
simulator.  Here are measurements of a Sun3 and a Sun4, both running
SPICE2G6, on three different input files.  The Sun3 model (3/260) is among
the fastest Sun3's ever made, while the Sun4 (4/260) is a medium-performer,
employing the 16 MHz Fujitsu gate array SPARC.  I apologize for having no
measured data to present on the non gate array (custom) CMOS SPARCs, nor
BIT's SPARC built out of ECL, nor Prisma's SPARC in Gallium Arsenide.

 ********************* SPICE 2G.6   USER CPU TIMES ***********************
  Dataset (input circuit)     Sun 3/260       Sun 4/260    Sun4 faster by?
===========================================================================
       digsr                  361.2 sec        218.3 sec      1.65 X
       bipole                 112.0 sec         61.1 sec      1.83 X
       comparator             129.4 sec         66.0 sec      1.96 X


Other large CAD packages have been measured for the Sun4 but not, to my
knowledge, the Sun3.  For example, the SPEC benchmark suite includes
"Espresso" (a logic equation minimizer and PLA generator).  SPEC
measurements of the SPARCstation_1 have been published, but not the Sun3.
On Espresso the SPARCstation_1 is 8.9X faster than a VAX 11-780, making
it *roughly* 3X faster than a Sun3/260 for Espresso.  (However this is a
guess in the absence of data).
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	(408) 991-0208    mark@mips.com  {or ...!decwrl!mips!mark}