🚀 go-pugleaf

In article <85138@linus.UUCP> bs@gauss.UUCP (Robert D. Silverman) writes:
>:There should be instructions on the order of "multiply step" and "divide 
>:step", each of which will do one of the 32 adds/subtracts and then shift.  
> 
>There is a multiply step instruction. There is no such support for division.
>It can take 200+ cycles to do a division on the SPARC [worst case]. 
>A 32 x 32 bit unsigned multiply takes 45-47 cycles. 

Oh, posh.  A CDC Cyber 170/760 can do a 60x60 -> 60 multiply (fp) in 5
cycles, worst case.  Divide is atrocious, being the only instruction slower
than a load (a load is 26 cycles, but I forget exactly how long a divide
takes).  However, proper instruction ordering means you don't have to worry
too much about how long it takes.  (Multiply is pipelined [does two 30-bit
multiplies at the same time], but divide isn't.  Sequential algorithm, if I
remember correctly.  Apparantly Seymour *hates* divides 8-).)

Just had to plug Seymour 8-).

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Sean Eric Fagan  | "Time has little to do with infinity and jelly donuts."
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