🚀 go-pugleaf

In article <3101@umn-d-ub.D.UMN.EDU> rhealey@ub.d.umn.edu (Rob Healey) writes:
>In article <39807@ames.arc.nasa.gov> lamaster@ames.arc.nasa.gov (Hugh LaMaster) writes:

>>(just making this up out of whole cloth) with a starting clock speed of

>	For the first part, if MIPS, or whoever, can do 200MHz by 1993 what
>	prevents CRI, as opposed to CCC, from comming up with a faster
>	version of it's architecture? Remember, CCC is the Cray 3 and CRI

>	what I've read of the KM wars so far it seems to me that most
>	are assuming that supers will not improve in speed by that much.

Actually, my point about Cray is that CCC has now revealed in its business
plan that the next generation machine is expected to have a 500 MHz clock.
This was reported in SC Review.   I based my calculations on that public
information.  Now, who knows, CRI and/or CCC may have have something
faster up their sleeves.  On the other hand, they may continue to have
trouble developing machines sufficiently faster than the current models
to justify the high price tag...        So:

1)  Nothing will stop SC vendors from producing faster versions of their
architectures.  They have well developed plans to do so.  If current and
soon to be planned machines materialize on schedule, the SC speed advantage
could be 10:1  On the other hand, it could also drop to less than 4:1,
which would be ominous for the SC vendors.

2)  The economic advantage that developed during the last year for KMs
will widen considerably, if nothing speeds up the development cycle of
the SCs.  For 1/100 the cost, you will be able to get a machine with 1/10
the CPU speed (to grossly oversimplify).

3)  The next major challenge will be memory bandwidth, because KM CPU speed
is outstripping memory bandwidth.

4)  Don't hold your breath on real I/O bandwidth.  The challenge will be to
put enough in there to get something reasonable out of the CPU.  I think
10-40 MBytes/sec is probably doable for KMs.  Cray can get over 10MB/sec
through the filesystem on *one* 12MB/sec disk; so could a KM.  Redundant Arrays
of Inexpensive Disks should be able to give us devices with 12 MB/sec speeds.
If you could have *1* equivalent Cray disk on your system for a reasonable
price, your single job speed could match what you would get on a Cray.

>	I question whether this is a valid assumption to make. Also, there's
>	always the possiblility of supers switching to optical or hybrid
>	optical technologys.

I don't argue with this.  Certainly, "supercomputers" will always, by
definition, be faster.  But, 6 years ago they were *vastly* more *cost
effective* than smaller systems.  Now, smaller systems have an apparent
edge.  The price disadvantage will get too large to ignore in the next
few years.  At this point, it appears that the commodity nature of the 
microprocessor business will push the future generations of supercomputers
to being built out of micro building blocks.



>	Good question! And how about I/O bandwidth to disks? How about network
>	bandwidth? Might as well include anything else that might bottleneck.
>	Supers are not supers by MIPS alone, memory, disk and networking all
>	go along with the super title.

Absolutely no argument there.  What do you call a machine which is as fast
as a CDC 7600, but has one programmed I/O slow asynch. SCSI disk controller
for I/O?


***********************
Provocation for the day:  Which of today's Killer Micro CPUs is the best
suited towards 16-64 CPU high memory bandwidth shared coherent memory 
supercomputer implementations?

  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)694-6117