Re: Sanity Check, please

Article View: comp.arch

Article #22027

#22027

From: Ran Ginosar
Date: Wed, 10 Jan 1990 02:20

6 lines
728 bytes

I have seen published predictions by Intel similar to Josh's numbers,
except that they plan on 100M transistors per chip, not just 20M.
--
	Dr. Ran Ginosar			ran@cs.utah.edu
	Computer Science Department, University of Utah
	Salt Lake City, UT 84112.   Phone: 801-581-7705, fax 801-581-5843.

Technical Details

Message-ID: <RAN.90Jan10022014@tingeys.cs.utah.edu>

Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!hellgate.utah.edu!hellgate!ran

References: <Jan.8.22.57.41.1990.234@klaatu.rutgers.edu>

Show Full Headers

Complete Article Headers

Newsgroups: comp.arch
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!hellgate.utah.edu!hellgate!ran
From: ran@cs.utah.edu (Ran Ginosar)
Subject: Re: Sanity Check, please
Message-ID: <RAN.90Jan10022014@tingeys.cs.utah.edu>
In-reply-to: josh@klaatu.rutgers.edu's message of 9 Jan 90 03:57:45 GMT
Organization: University of Utah CS Dept
References: <Jan.8.22.57.41.1990.234@klaatu.rutgers.edu>
Date: 10 Jan 90 02:20:14

Reply to Parent Message