Article View: comp.arch
Article #2208Re: SRAM vs. DRAM, 33MHz 386 UNIX-PC
From: Randell Jesup
Date: Wed, 13 Sep 1989 03:26
Date: Wed, 13 Sep 1989 03:26
59 lines
3418 bytes
3418 bytes
In article <22011@cup.portal.com> cliffhanger@cup.portal.com (Cliff C Heyer) writes:
>>> 4. Are any board makers making (or have made) motherboards with ESDI and/or
>>> SCSI interfaces ON BOARD to bypass the 8MHz AT bus?
>>Even that's not enough. SCSI, for example, is still only 8 bits wide, and it's
>>maximum transfer rate of 4 megs/second is in the same ballpark as the fastest
>>AT buses. This is what Amiga hard disk controllers do (DMA), and we get up to 900k/sec
>>through the filesystem using asynchronous SCSI (1.5 megs/sec).
>
>Sounds like Commodore is really *trying* to put out a "best" product...I wonder
>about many others. For example, IBM PS/2s always score the lowest in disk I/O. I
>assume this is because they want to *encourage* customers to shift the needed
>I/O BW to IBM big iron.
I've never quite understood why msdos computers are so slow at FS
access and I/O in general. Note that that 900K/sec is through the filesystem,
not just raw I/O speed (with a good drive I've seen 1.3-1.4 meg/sec through
the I/O system, maybe 1.0-1.1 through the filesystem, using asynch scsi (1.5
meg/sec max)).
We try real hard to provide excellent HD/filesystem speeds compared
to any other micro (and often end up with 4-10x better on the same HD).
>What about SYNCHRONOUS SCSI in the Amiga? (4.0MB/sec) Or DMA & memory
>can't handle it at this speed(?)
>
>Do sync & async are about the same cost? Why use synchronous SCSI vs.
>async?
Sure, synchronous scsi con be done, though the controller we're
discussing didn't have a fast enough clock on-board to use the 4 meg/sec
rate (7 Mhz clock available, need a 10(?) Mhz clock to do 4 meg/sec - note
I'm just talking clocks, not bus speeds). The current amiga bus bandwidth
is about 3.5 meg/sec, if I remember correctly. If we had the clock we
could approach that.
>Actually I must admit I don't know that much about the AT bus.
>What is the AT bus rated at in aggregate and effective MB/sec throughput?
I suspect it's based on the speed of the processor (causes amusing
problems for boards designed for lower speeds, I suspect).
> (For example, I assume it is
>16 bits wide? Does this mean at 8 MHz it's aggregate throughput is 16MB/sec?
>But I suppose because of DOS I/O is done via 8 bit bytes...which would give
>8MB/sec. Still this sounds awfully high - A 15MHz ESDI drive transfers at
>15Mbits/sec which is 1.5MB/sec, but this is said to be too fast for
>the AT bus.....and so the 10MHz ESDI is used.)
8Mhz doesn't mean 8 million xfers of 16 bits per second. For example,
the amiga bus clock is 7.16 Mhz, 16 bits wide. However, bus transfers require
a number of cycles (on almost any bus/processor I've seen).
>Cliff
--
Randell Jesup, Keeper of AmigaDos, Commodore Engineering.
{uunet|rutgers}!cbmvax!jesup, jesup@cbmvax.cbm.commodore.com BIX: rjesup
Common phrase heard at Amiga Devcon '89: "It's in there!"
Technical Details
Message-ID:
<7890@cbmvax.UUCP>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!usc!ginosko!uunet!cbmvax!jesupReferences:
<21936@cup.portal.com> <46500076@uxe.cso.uiuc.edu> <22011@cup.portal.com>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!usc!ginosko!uunet!cbmvax!jesup From: jesup@cbmvax.UUCP (Randell Jesup) Newsgroups: comp.arch Subject: Re: SRAM vs. DRAM, 33MHz 386 UNIX-PC Message-ID: <7890@cbmvax.UUCP> Date: 13 Sep 89 03:26:25 GMT References: <21936@cup.portal.com> <46500076@uxe.cso.uiuc.edu> <22011@cup.portal.com> Reply-To: jesup@cbmvax.UUCP (Randell Jesup) Organization: Commodore Technology, West Chester, PA Lines: 59