🚀 go-pugleaf

In article <160@zds-ux.UUCP> gerry@zds-ux.UUCP (Gerry Gleason) writes:
>In article <8905@portia.Stanford.EDU> underdog@portia.Stanford.EDU (Dwight Joe) writes:
>>In article <7341@pdn.paradyne.com> alan@oz.paradyne.com (Alan Lovejoy) writes:
>>|<NEXT can only be saved if Steve Jobs replaces the 680X0
>>|<with RISC processor like the Sparc chip.  In all compute

>>So, Jobs was squeezed out of the higher education market.  The
>>one thing that Jobs didn't count on back in mid 1980 was the
>>rise of the RISC machines.  What hurt him was the very long
>>product development time of NEXT.  He expected that back in mid-1980
>>(when he conceived of NEXT) there would be nothing like RISC.

>this is comp.arch, maybe we could discuss whether RISC was predictable
>in mid-1980 (do you mean mid 1980's, 1980 seems much to early for
>the inception of the NEXT concept).  By the mid 1980's it was very
>clear than RISC would be an important technology.  In addition to
>being a big selling point, a RISC processor would have lessened the
>impact of the machines departure from software standards.

Why don't we just kill off all this silly speculation: all of this is
100% wrong: NeXT has certainly been aware of RISC very early.  At the time they
had to make their choice of processor [this was 1986/87], a 68030
was a very reasonable choice, as there was NO RISC available with:
	high performance
	low cost
	large volume supply
	with sure supplies
After all, at that point:
- Clipper performance wasn't that strong, and I'm not sure when the
Fairchild uncertainty was going on, but it might have been around then.
- MIPS was a 120-person company relying on foundries (not semi partners),
and NeXT would have been incredibly gutsy at that point to have used MIPS.
- SPARC wasn't announced yet, and the low level of integration of the
gate array designs surely would have exceeded NeXT cost goals.
- 88K was far away
- i860 was even further off.

Anyway, one might criticize them for not guessing how long the software
would take, and then trying to guess which RISCs would do well and
picking one of them, but I think it would have taken amazing precognition
in early 1987 to predict what's happened since... and amazing courage to
have bet the company on things not yet proven.  Had they started a year
later, maybe things would be different, but don't ding them by claiming
something was obvious, when it wasn't at all.

>
>Another case in point, I had the opportunity to work on a project
>using AT&T's CRISP processor, and was very surprised to find out that
>a proposal to build this chip had been around since before they
Yes, it is sad that CRISP didn't get out, as it at least had some elegant
and clever ideas.

>BTW, what are some current prices on RISC chips?  I have read that
>80486's are ~950$ in thousand quantity, and someone posted 68040's
>are expected to be ~750$.  I suppose you should include the MMU and
>FPU in the RISC prices since they are on the chip for the comparable
>CISC's, but since a large percentage of users don't need and FPU
>including this unit probably distorts the comparison.  From day one
>I expected RISC processors to get to commodity prices very quickly
>(i.e. prices based almost completely on the cost to make to chip).
>Has that happened yet?

For sure, in 10,000s, I've heard of 12.5MHZ R2000/R2010 chipsets
at $100 for the pair, which means you build a pretty reasonable cache &
memory interface [i.e., the whole core] for $200-$250.  This was a while ago,
so the higher clock rates are probably creeping down from the $10/mip (CPU)
that was being quoted a year back. (Note that such a configuration should
be usually faster on integer, and even faster on FP, than a 25MHz 486 with
external cache.)
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: 	{ames,decwrl,prls,pyramid}!mips!mash  OR  mash@mips.com
DDD:  	408-991-0253 or 408-720-1700, x253
USPS: 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086