Article View: comp.arch
Article #22290Re: '040 vs. SPARC (was: Next computer...)
From: Dave Christie
Date: Thu, 08 Feb 1990 16:39
Date: Thu, 08 Feb 1990 16:39
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1323 bytes
In article <2101@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com (bill davidsen) writes: | | I would like to propose using MISC instead of | CISC, since the microcode which used to require many cycles per | instruction is now replaced by hard logic for virtually all of the | instructions, maybe all in the 040. I expect the 586 to have 1+ According to an article on the '040 in this week's EE Times: "The IU integer pipeline has three different [control] mechanisms: an initial decode PLA for the EA [address formation] stage, a ROM-driven microcode engine for following stages and a finite ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ state machine to control the EU stage." Just thought I'd pass that on.... -------- Dave Christie
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!samsung!brutus.cs.uiuc.edu!apple!sun-barr!decwrl!amdcad!proton!davec From: davec@proton.amd.com (Dave Christie) Newsgroups: comp.arch Subject: Re: '040 vs. SPARC (was: Next computer...) Message-ID: <29090@amdcad.AMD.COM> Date: 8 Feb 90 16:39:30 GMT References: <8905@portia.Stanford.EDU> <160@zds-ux.UUCP> <38415@apple.Apple.COM> <2101@crdos1.crd.ge.COM> Sender: news@amdcad.AMD.COM Reply-To: davec@nucleus.amd.com (Dave Christie) Organization: Advanced Micro Devices, Inc., Austin, Texas Lines: 19