🚀 go-pugleaf

In article <WAYNE.90Feb11165528@dsndata.uucp> wayne@dsndata.uucp (Wayne Schlitt) writes:

|                                                                 the
| following is a list of the parts that i can think of and blatant
| guesses about when i expect them to become 64 bit.
| 
| integer registers (ALU) 20-30 years

  I have a hard time believing that anyone will not have the int able to
hold a physical address, so this doesn't match your prediction below. I
say 5 years.

| floating point regs     64 bit now, 128 bit in the next 3-10 years.
|                         you will never see more than 128 bits.

  I hate to say never, but It's hard to imagine a good use for it, other
than to cover the sins of bad numerical analysis. Lots of bits can hold
off roundoff. I did note that when we moved applications from Honeywell
to IBM and Cray, the IBM couldn't do some programs without recoding the
algorithm, and the Cray needed d.p. for some. This is due to the 72 bit
d.p. on the Honeywell.

| address registers       10-20 years

  Again, I think 5, and the arithmetic and address registers will be the
same size.

| virtual address space   the 386 has a 48 bit virtual address space via
|                         segments now, but that's only because it was
|                         segmented to begin with.  other architectures
|                         like the 68k and most risc's will be forced to
|                         have segment registers in the next 5-15 years.
|                         HPPA (HP's risc) have them now.

  I think you're right on about 48 bits, I'm not sure if seg regs will
come or just 64 bit addressing.

| physical address space  2-5 years for 48 bit, 5-20 for a full 64 bit.

  I think you were talking typical, and I doubt this. Typical is 24 bits
used (16MB) and large is 28 bits (256MB). Machines like Convex and MIPS
are using 32, but few machines are actually configured that way.

  Assuming that memory drops in cost by 1 bit every three years, the big
workstations will not run out of 32 bit addressing before the millenium.
If the same CPUs are used in personal applications (a distinct
possibility) then their growth will push past 32 bits. My guess is that
8 years for 48 bits, 12 for 64.

| data path               64 bit memory paths would be used to fill
|                         caches quicker, but you might see harvard
|                         style separate 32 bit data and instruction
|                         paths coming off chip first.  from the
|                         software point of view, this is the _least_
|                         noticeable and when it will come around depends
|                         on how well chip designers are at getting lots
|                         of pins on the chips.
| instruction path        see data path

  You make a very good point here, but I think the problem will be
solved quickly, because memory speed is not changing fast enough, and
because wide busses are probably cheaper to add than memory speed. I
predict 5 years on this one.

  How about a "popsicle" chip carrier, with connections on the bottom
and four faces of a chip, and a "stick" on top to ease removal? ;-)/2
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
            "Stupidity, like virtue, is its own reward" -me