64 bit registers

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Article #22384

#22384

From: Jeff Kenton
Date: Mon, 12 Feb 1990 18:48

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In article <1990Feb12.133414.1661@oracle.com> csimmons@oracle.com writes:
>Now that FPUs and ALUs are being implemented on the same chip, maybe
>it would make sense to implement a single register set instead of
>two separate register sets.  It would probably simplify certain aspects
>of register allocation in compilers.  Of course, the 88K seems to have
>kept two separate register sets...
>
>-- Chuck

The 88100 only has one set of registers (using pairs for double precision
floating point).  Rumor has it that the 88110 will have a separate set of
80-bit FP registers (as well as lots of other goodies).

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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!snorkelwacker!husc6!encore!pinocchio.encore.com!jkenton
From: jkenton@pinocchio.encore.com (Jeff Kenton)
Newsgroups: comp.arch
Subject: 64 bit registers
Message-ID: <11121@encore.Encore.COM>
Date: 12 Feb 90 18:48:31 GMT
Sender: news@Encore.COM
Reply-To: jkenton@pinocchio.encore.com (Jeff Kenton)
Organization: Encore Computer Corp, Marlboro, MA
Lines: 13