Article View: comp.arch
Article #22506Re: CISC Silent Spring
From: Steve Wampler
Date: Wed, 21 Feb 1990 17:40
Date: Wed, 21 Feb 1990 17:40
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> This new "bat" machine is quite CISCy, and sounds pretty interesting,
> at least based on the tidbits from EE Times. A 64 bit MPU with
> instructions to support C-like things such as telling if one byte in
> a machine word is '\0' or '\n', or another which basically implements
> an 8-case switch statement. Of course, like most new things, there
> are incredible MIPS claims for it but nothing like SpecMark or even
> Dhrystone out yet.
>
> Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
Well, I haven't seen the EE Times, but I know a little about the BAT.
The first model, the 6420, is, in my opinion, not a great implementation.
The 6430, however, is well implemented. The BAT series does many of the
things that RISCS have been doing (large caches, lots of registers, etc.)
in a CISC environment (18 different addressing modes!) Most of the
'common' instructions (i.e. RISC) are single cycle and typically one or
two bytes (so you can load 8 or 4 in one 64-bit bus access). C-style
string functions and memory functions are encoded as single instructions
that operate 8-bytes at a time. Function calls are 3(?) cycles, and
interupts are equally fast. Also nice are the 256(?) data channels
for nice fast I/O.
The MIPS claim is misleading - that is for character processing
(where they should be *fast*, given the 8-byte parallelism), PEAK
performance. The biggest win (aside from character processing)
is the small impact heavy I/O has on overall performance - it just
doesn't slow down much under heavy I/O.
Given the slow clocks on the 6420 and 6430, they do a pretty impressive
job. I'm anxious to see what the faster clock versions do.
I'm supposed to be getting one next week - though the OS may follow
after that by another week or so - to play with. If there's anything
really interesting in the real machine (I don't expect that much from
the 6420) I'll be happy to post it.
Oh, yes, it's a 48-bit address space. One last interesting feature
is the ability to play with part of a register without affect the
other parts. So you can put a 16-bit tag on a 48-bit address and
not have to unpack them into separate registers. The machine *should*
be able to run Icon and Lisp like, well, a bat out of ....
--
Steve Wampler
{....!arizona!naucse!sbw}
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!asuvax!noao!arizona!naucse!sbw From: sbw@naucse.UUCP (Steve Wampler) Newsgroups: comp.arch Subject: Re: CISC Silent Spring Message-ID: <1891@naucse.UUCP> Date: 21 Feb 90 17:40:33 GMT References: <9748@cbmvax.commodore.com> Organization: Northern Arizona University, Flagstaff, AZ Lines: 44