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Article #2263

DISC (Directed Instruction Set Computers)

#2263
From: John Hascall
Date: Sat, 16 Sep 1989 15:23
30 lines
1605 bytes
    I was thinking about how processors are becoming more specialized
    (sort of shotgun wedding between RISC and CISC, I guess).

    You might have a system with:

       a RISC CPU        (specialized integer processor)
       a FPU/MATH chip   (specialized floating point processor)
       a graphics chip   (specialized ... you get the idea)

    What I was wondering was: will be seeing processors whose architecture
    is specifically designed to specific standards (a la IEEE FPUs) say, for:

       o PostScript
       o Xwindows
       o OSI
       o SCSI
       o String operations
       o ANSI C
       o etc...

    as an alternative to attempting to acheive good performance on a
    variety of task by tacking additions on to a single processor?

    One of the questions one would surely ask before embarking on such
    a scheme would be: How long are these standards going to be viable?
    Will I be stuck with 1e5 Xchips when everyone dumps it for Ywindows?
    Will it yield a significant performance advantage?

    Comments from the industry mavens?
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Message-ID: <1529@atanasoff.cs.iastate.edu>
Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!atanasoff.cs.iastate.edu!hascall

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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!atanasoff.cs.iastate.edu!hascall
From: hascall@atanasoff.cs.iastate.edu (John Hascall)
Newsgroups: comp.arch
Subject: DISC (Directed Instruction Set Computers)
Message-ID: <1529@atanasoff.cs.iastate.edu>
Date: 16 Sep 89 15:23:55 GMT
Sender: hascall@atanasoff.cs.iastate.edu
Reply-To: hascall@atanasoff.cs.iastate.edu (John Hascall)
Distribution: na
Organization: Iowa State Univ. Computation Center
Lines: 30