Article View: comp.arch
Article #2265Re: DISC (Directed Instruction Set Computers)
From: John Mashey
Date: Sat, 16 Sep 1989 21:04
Date: Sat, 16 Sep 1989 21:04
105 lines
5572 bytes
5572 bytes
In article <1529@atanasoff.cs.iastate.edu> hascall@atanasoff.cs.iastate.edu (John Hascall) writes:
> I was thinking about how processors are becoming more specialized
> (sort of shotgun wedding between RISC and CISC, I guess).
> You might have a system with:
> a RISC CPU (specialized integer processor)
> a FPU/MATH chip (specialized floating point processor)
> a graphics chip (specialized ... you get the idea)
> What I was wondering was: will be seeing processors whose architecture
> is specifically designed to specific standards (a la IEEE FPUs) say, for:
> o PostScript
> o Xwindows
> o OSI
> o SCSI
> o String operations
> o ANSI C
> o etc...
> as an alternative to attempting to acheive good performance on a
> variety of task by tacking additions on to a single processor?
>
> One of the questions one would surely ask before embarking on such
> a scheme would be: How long are these standards going to be viable?
> Will I be stuck with 1e5 Xchips when everyone dumps it for Ywindows?
> Will it yield a significant performance advantage?
Let's try a generic opinion, and then some specifics:
A special-purpose chip will be built IFF:
a) It can do the job enough better than a general-purpose one,
where "better" means, among other things:
faster, at similar cost OR
for same performance, cheaper
less board space for equivalent solution
it does so in the context of a complete system.
etc..
b) It can continue evolving that way, i.e., it is not a temporary
advantage as general CPUs continue.
c) The problem is reasonably partionable, especially in the face
of high bandwidth requirements. For example, if integrating
2 devices merely adds their pin-counts together, it's
not clear that anythign useful is happening....
c) These above imply that there is a significantly-sized market for
the special-purpose device, or else it may achieve a), at some
point in time, but gets superceded after a while because more
general devices get more volume, and then end up getting cheap.
d) These also imply that when you build something:
You truly understand what something should do, i.e.,
what the right primitives are.
You expect that something to last a while.
Computing history has seen many special-purpose devices that have been
transient phenomena.
With few exceptions, machines focused too closely on specific
languages have failed to be successful.
Let's look at the list above for examples; I'll add my opinions about
the survivability thereof:
Integer CPUs will be around forever
FPUs will be around forever: if you want any reasonable FP
performance, you need one, whether on the same die or
not is irrelevant. If you want any serious FP performance,
you need something built with datapaths and hardware that
are appropriate, because the integer ones aren't, and it
takes a long time to simulate FP on an integer unit.
(It was always amusing to see people criticize commercial
RISCs as being "impure" RISCs because they'd added
floating point :-) ) Imagining a time in which an
integer CPU will somehow get fast enough that people
wanting real FP will be satisfied to emulate it, is beyond me.
Graphics chips will probably be around, although some of their functions
may get integrated [a la i860]. Maybe somebody who really
knows can comment. Workstations have bounced back and forth
between using special hardware and not, with each round of
improvement, at least at the lower cost levels.
PostScript Maybe somebody from Weitek will comment, although I think
some of the current RISCs run it pretty well.
Xwindows I doubt it, strongly.
SCSI There are plenty; if only more of them looked the same.
String operations Possible, but more likely as a coprocessor integrated on
the same die, as allowed by various architectures. The
real problem on this one (which is why you don't see such
things) is that it is hard to beat a reasonable integer
unit by very much. For example, multi-chip solutions
have extra chip crossings. In the coming generation of
integrated superchips with serious on-chip caches,
a coprocessor like this needs access to those caches,
and if it's off-chip, you discover that the performance
penalties put you back where you were.
ANSI C I doubt this, also, rather strongly. What would it be,
that's much different from current CPUs. In addition,
some CPus might only run C, but many must run other things.
----------
As an example of something likely to stay around, Digital Signal Processors
are a good example: you can almost always make them faster or cheaper
than the general-purpose CPU in the same technology, people know what
they're for, etc.
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com
DDD: 408-991-0253 or 408-720-1700, x253
USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
Technical Details
Message-ID:
<27685@winchester.mips.COM>Path:
arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!apple!mips!mashReferences:
<1529@atanasoff.cs.iastate.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!apple!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: DISC (Directed Instruction Set Computers) Message-ID: <27685@winchester.mips.COM> Date: 16 Sep 89 21:04:37 GMT References: <1529@atanasoff.cs.iastate.edu> Reply-To: mash@mips.COM (John Mashey) Distribution: na Organization: MIPS Computer Systems, Inc. Lines: 105