Article View: comp.arch
Article #22721Query: memory architecture for high-speed random access
From: Reuven Soraya
Date: Thu, 01 Mar 1990 15:28
Date: Thu, 01 Mar 1990 15:28
14 lines
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956 bytes
In "Contrasting Architectures of Minisupercomputers: Form Shapes Function" in Supercomputing Review (1st issue) it is observed that: "[...] the Convex, Cydrome and Multiflow minsupers architectures have no cache at all. They rely instead upon more intensive inter- leaving. That makes the C-series and Trace computers more suitable for problems with large amounts of random data." This suprises me and I would like to get more information about (a) these machines and (b) this concept in general. Thanks! Reuven S.
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Path: arc1-ca.pugleaf.net!utzoo!censor!isgtec!reuven From: reuven@isgtec.UUCP (Reuven Soraya) Newsgroups: comp.arch Subject: Query: memory architecture for high-speed random access Keywords: Convex, Cydrome, Multiflow, memory interleave Message-ID: <292@isgtec.UUCP> Date: 1 Mar 90 15:28:57 GMT Reply-To: reuven@isgtec.UUCP (Reuven Soraya) Distribution: na Organization: ISG Technologies Inc., Mississauga, Ontario Lines: 14