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          Advance Programme and Registration

2ND WORKING CONFERENCE ON ASYNCHRONOUS DESIGN METHODOLOGIES

Sponsored by ESPRIT Basic Research Working Group 7225 (ACiD-WG)
in cooperation with the IEEE Computer Society and its 
Technical Committee on VLSI

                 May 30 - 31, 1995

    Abbey Conference Centre, South Bank University, London

This event is the successor of the Working 
Conference on Asynchronous Design Methodologies 
held in Manchester, April 1993. It is also the final 
event being organized by ACiD-WG, a working 
group on asynchronous circuit design that has been 
funded by the Commission of the European  
Communities as part of the ESPRIT Third Framework.

The Working Conference is open to all researchers 
and practitioners in the VLSI community. The event 
will begin with a tutorial on asynchronous circuits 
and systems by Erik Brunvand of the University of 
Utah, to set the scene. It will end with a status report 
by Steve Furber of the University of Manchester on 
his asynchronous implementations of the ARM microprocessor.

The Working Conference will focus on

                1. current development of, and
                2. experience with,

methods, techniques and tools for the design of 
asynchronous VLSI circuits. All twenty-two papers 
accepted for presentation have been subject to a 
rigorous review process. They will appear in a post-
proceedings publication of the IEEE Computer 
Society Press. The papers address the following topics

* cost/performance prediction, measurement and comparison
* processor architectures
* control, data-path and interface circuitry
* automatic synthesis and verification
* robustness and testing for fabrication faults.

Several papers relate to the Tangram silicon 
compiler developed at Philips Research Laboratories 
and how it has been used to implement a low power 
Digital Compact Cassette Player chip-set.

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                             Registration Form

Please complete and return this form by May 15 to Mrs. Antoinette Dixon, 
Enterprise Services, South Bank University, 103 Borough Road, London SE1 0AA. 
Tel: +44-171-815 6908, Fax: +44-171-815 6999. 
Ref: Working Conference on Asynchronous Design Methodologies.

Please enclose a cheque for 150 pounds sterling made payable to 
"South Bank University". Contact Antoinette if  you require us to invoice your
company. Credit cards are not accepted. In the event of cancellation, a full
refund will be provided if Antoinette is notified by May 15. The registration
fee includes refreshments and lunch on both days and a pre-print of the
proceedings. 
        
Title:.....Forename:.................Surname:...................................
Affiliation:....................................................................

Address:........................................................................
................................................................................
................................................................................
Phone:......................FAX:..................E-mail:.......................

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             Venue and Accommodation

The Abbey Conference Centre, part of South Bank 
University,  is located on the London Road, SE1, 
close to the Elephant & Castle underground 
(subway) station, Bakerloo line exit. 

Participants will probably wish to stay in the "West 
End" (central London). South Bank University has 
arranged discounted rates at a number of hotels 
through the British Hotel Reservations Centre, Tel: 
+44-171-828 1075, Fax: +44-171-828 6439. Ref: 
0101SB/ADM. You can book three star hotel 
accommodation, for example, through them for 50-
60 pounds per night, single room.

             Accepted Papers

"Performance Evaluation of Asynchronous Logic 
Pipelines with Data Dependent Processing Delays",
Kearney, Bergmann (Q.U.T., Brisbane)

"Low-Latency Asynchronous FIFO Buffers",
Yantchev, Huang, Josephs, Nedelchev
(Adelaide U./Oxford U./SBU/Surrey U.)

"Designing an Asynchronous Pipeline Token Ring 
Interface", Yakovlev, Varshavsky, Marakhovsky, 
Semenov (Newcastle U./Aizu U.)

"A Design Methodology for Micronet-based 
Asynchronous Processors",
Arvind, Mullins, Rebello (Edinburgh U.)

"ARAS: Asynchronous RISC Architecture 
Simulator", Chien, Franklin, Pan, Prabhu 
(Washington U., St. Louis)

"ECSTAC: A Fast Asynchronous Microprocessor",
Morton, Appleton, Liebelt (Adelaide U.)

"Hades - Towards the Design of an Asynchronous 
Superscalar Processor", Elston, Christianson, 
Findlay, Steven (U. Hertfordshire)

"Optimised State Assignment for Asynchronous 
Circuit Synthesis", Ykman, Lin (IMEC)

"Relative Liveness: From Intuition to Automated 
Verification", Negulescu, Brzozowski (U. Waterloo)

"Hierarchical Gate-Level Verification of Speed-
Independent Circuits", Roig, Cortadella, Pastor (UPC)

"Asynchronous Circuits Based On Multiple 
Localised Current Sensing Completion Detection",
Grass, Jones (Loughborough U.T.)

"New CMOS VLSI Linear Self-Timed 
Architectures", Acosta, Bellido, Valencia, Barriga, 
Jimenez, Huertas (CNM, Sevilla)

"Technology Mapping of Timed Circuits",
Myers, Beerel, Meng (Stanford U.)

"Testing Self-Timed Circuits using Partial Scan",
Khoche, Brunvand (U. Utah)

"Testing C Elements is not Elementary",
Brzozowski, Raahemifar (U. Waterloo)

"VLSI Programming of a Low-Power Asynchronous 
Reed-Solomon Decoder for the DCC Player",
Kessels (Philips)

"Single-Rail Re-implementation of a DCC Error 
Detector Using a Generic Standard-Cell Library",
van Berkel, Burgess, Kessels, Peeters, Roncken, 
Schalij, Wiel  (Philips/EUT)

"Single-Rail Handshake Circuits",
Peeters, van Berkel (EUT/Philips)

"Stretching Quasi Delay Insensitivity by Means of 
Extended Isochronic Forks",
van Berkel, Huberts, Peeters (Philips/EUT)

"Sequencer Circuits for VLSI Programming",
Bailey, Josephs (EUT/SBU)

"High-Level Test Evaluation of Asynchronous 
Circuits", Wiel (EUT)

"A Hybrid Asynchronous System Design 
Environment", Farnsworth, Edwards, Liu, Sikand 
(Manchester U.)

 		Programme Committee

Mark Josephs (Chair) 	South Bank University, UK
Peter Beerel		University of Southern California, USA
Steve Burns		University of Washington, Seattle, USA
John Brzozowski		Waterloo University, Canada
Jordi Cortadella	Polytechnic University of Catalonia, Spain
Jo Ebergen		Waterloo University, Canada
Doug Edwards		Manchester University, UK
Mike Kishinevsky	University of Aizu, Japan
Alex Kondratyev		University of Aizu, Japan
Bill Lin		IMEC, Belgium
Alain Martin		California Institute of Technology, USA
Charles Molnar		Sun Microsystems Laboratories, USA
Kees van Berkel		Philips Research Laboratories, The Netherlands
Tom Verhoeff		Eindhoven University of Technology, The Netherlands
Ken Yun			University of California, San Diego, USA