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Article #23438Re: Win95 performance counter interface?
From: LKS
Date: Fri, 04 Dec 1998 00:00
Date: Fri, 04 Dec 1998 00:00
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1678 bytes
Andy Glew wrote: > > I'd like to see a VxD which could intercept processoer cache misses, > > branch prediction failures etc. ;) > > I think the P II supports grabbing all this extra info but I know no > > more. > > The P6 cores all support interrupts on such performance events. > > Unfortunately, I know of no public API to access it. I stand corrected. Imagine how slow your computer would be if there was a routine which was called on every cache miss! Surely that would bias the results though... -lks
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 102b75,80c509bc716c6415 X-Google-Attributes: gid102b75,public X-Google-Thread: 110292,80c509bc716c6415 X-Google-Attributes: gid110292,public X-Google-Thread: 114917,80c509bc716c6415 X-Google-Attributes: gid114917,public X-Google-Thread: f9d87,80c509bc716c6415 X-Google-Attributes: gidf9d87,public From: LKS <lk213@hermes.cam.ac.uk> Subject: Re: Win95 performance counter interface? Date: 1998/12/04 Message-ID: <747nvg$o2q$3@winter.news.rcn.net> X-Deja-AN: 418488600 Content-Transfer-Encoding: 7bit Approved: <johnfine@erols.com> References: <72kj98$lpj$1@autumn.news.rcn.net> <73p61n$3tr$1@winter.news.rcn.net> <73ppdc$bif$1@winter.news.rcn.net> <742ipp$gm8$6@winter.news.rcn.net> <747amm$5da$1@winter.news.rcn.net> X-Accept-Language: en Content-Type: text/plain; charset=us-ascii X-Complaints-To: abuse@rcn.com X-Trace: Z5oLTi4tlQTByaptEUM15d6pePLI85ZySNXjGS4Rdas= Organization: University of Cambridge, England Mime-Version: 1.0 NNTP-Posting-Date: 4 Dec 1998 04:21:04 GMT Newsgroups: comp.arch,comp.lang.asm.x86,comp.sys.intel,intel.microprocessors.pentium_ii