🚀 go-pugleaf

In article <8123@cbmvax.UUCP> jesup@cbmvax.UUCP (Randell Jesup) writes:
+---------------
| 	The RPM-40 has an interesting trick to avoid problems like this:
| it keeps a "queue" of PC values (and a few other internal values).  This
| makes restart easy (and it only takes 8 cycles to store all the queues).
+---------------

The Am29000 freezes a copy of PC0, PC1, and PC2 in backup registers when it
takes a trap. These are values of the PCs associated with the decode, execute,
and writeback stages of the pipeline, respectfully. For most traps, PC1 is
the instruction causing the trap. [For memory-related exceptions which may
have been caused by a *much* earlier load/store (or LOADM/STOREM), the
relevant address/data/controls are stored in a set of "channel" backup regs.]

You need both PC0 & PC1 to restart from a trap, as PC1 may have been the
instruction in the delay slot of a jump, in which case PC0 is already the
target address. [I assume some similar mechanism exists on all RISCs with
delayed branches -- MIPS, SPARC, etc.]

PC2, while not needed for trap restart, gives you the fabled and
universally-desired "Came From" register. That is, when a wild jump
lands you in hyperspace, causing a page fault or ill-mem-ref trap,
PC2 will contain the address you came from [actually, the address
of the delay-slot of the jump]. This makes what is usually the most
difficult-to-find problem -- the wild jump/call -- one of the easiest.
[The same should be true of the RPM-40, no?]

Add the Came From Register, however implemented, to the list of
"required" features for all new computer architectures...


Rob Warnock
Systems Architecture Consultant

UUCP:	  {amdcad,fortune,sun}!redwood!rpw3
DDD:	  (415)572-2607
USPS:	  627 26th Ave, San Mateo, CA  94403