🚀 go-pugleaf

In article <1989Oct7.165438.2533@esegue.segue.boston.ma.us> johnl@esegue.segue.boston.ma.us (John R. Levine) writes:
>Ellis discusses the FPS-164 in his book.  He calls it an LIW, kind of a
>predecessor to a VLIW.  It's a horizontally microcoded machine rather than a
>RISC with a lot of parallel functional units.  The trace scheduling compiler
>used for VLIWs is quite different from the one used for the FPS.  Someone did
>try trace scheduling for the FPS, but gave up because the assymetry of the
>architecture made it very hard.  There are several pages in Ellis' book that
>talk about this.

Thanx for the info.  

It's my understanding that some of the 64 bit products that FPS introduced
after I left in 1985, had a cleaned up instruction set, e.g., a write to 
table memory RAM no longer required the special I/O format instruction and
more registers were directly addressable.

Does anyone out there know:
   1) Was anything else "cleaned up" in the instruction set?
   2) Did this clean-up address the asymmetries mentioned in the
      Ellis book?
   3) Did the Fortran compiler ever change to use Table Memory RAM?
   4) Did the Fortran compiler ever change to use a trace scheduling
      algorithm?
                                just curious, thanx in advance.
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