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Article #2530

Re: Self-modifying code

#2530
From: Mark Crispin
Date: Wed, 11 Oct 1989 23:40
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In article <1619@atanasoff.cs.iastate.edu> hascall@atanasoff.UUCP (John Hascall) writes:
>In article <9175@etana.tut.fi> pl@etana.tut.fi (Lehtinen Pertti) writes:
>}From article <6481@pt.cs.cmu.edu>, by koopman@a.gp.cs.cmu.edu (Philip Koopman):
>}	I've been lately wondering if there is any architecture
>}	with possibility to execute instruction indirectly.
>	    Well, how about the IBM 370 series.  (not exactly modern, I know)

On the DEC PDP-10 (CPU for the DECsystem-10 and DECSYSTEM-20), *all*
instructions calculated an "effective" address based on an 18-bit
value (the right half of the instruction word), index register (the
low order 4 bits of the left half iff non-zero), and indirect bit (the
next higher order bit after the index register).  This was done before
any opcode decoding was done (hence, you would get any page faults
caused by the effective address decoding before you'd get any illegal
instruction faults).  Indirection was recursive, so you could do an
amazing set of references.

So, you could always execute indirect and/or indexed.  In fact, it was
fairly common to do XCT FCNTAB(FC) where FCNTAB was a table of
instructions to execute and FC was the desired index into that table.


Mark Crispin / 6158 Lariat Loop NE / Bainbridge Island, WA 98110-2020
mrc@CAC.Washington.EDU / MRC@WSMR-SIMTEL20.Army.Mil / (206) 842-2385
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Message-ID: <3998@blake.acs.washington.edu>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!wuarchive!gem.mps.ohio-state.edu!tut.cis.ohio-state.edu!ucsd!ogccse!blake!Tomobiki-Cho!mrc
References: <6481@pt.cs.cmu.edu> <9175@etana.tut.fi> <1619@atanasoff.cs.iastate.edu>

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From: mrc@Tomobiki-Cho.CAC.Washington.EDU (Mark Crispin)
Newsgroups: comp.arch
Subject: Re: Self-modifying code
Message-ID: <3998@blake.acs.washington.edu>
Date: 11 Oct 89 23:40:06 GMT
References: <6481@pt.cs.cmu.edu> <9175@etana.tut.fi> <1619@atanasoff.cs.iastate.edu>
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