🚀 go-pugleaf

>In article <35825@lll-winken.LLNL.GOV> brooks@maddog.llnl.gov () writes:
>

This article certainly generated some responses.  Unfortunately, some responders
seemed to miss (or chose to ignore :-) the tongue-in-cheek nature of the title.

I used to argue, only a couple of years ago, that supercomputers produced
cheaper scalar computing cycles than "smaller" systems.  That isn't true today.
However, supercomputers still produce cheaper floating point results on
vectorizable jobs.   And, they produce memory bandwidth cheaper than other
systems.  That may change, too. 


Q: What will it take to replace a Cray with a bunch of micros?

A: (IMHO) :  A "cheap" Multiport Interleaved Memory subsystem.  In order to do
that, you need to provide a way to build such subsystems out of a maximum of 3
different chips, and be able to scale the number of processors and interleaving
up and down.  A nice goal might be a 4-port/32-way-interleaved 64-bit-wide
subsystem cheap enough for a $100 K system.  (That is only enough memory
bandwidth for a 1 CPU Cray-like system,  or 4 micro based CPUs with only
1 word/cycle required, but it would sure be a big step 
forward.)  The subsystem needs to provide single level local-like memory, 
like a Cray.

[Or, show a way to make, in software, a truly distributed system as efficient
as a local memory system (PhD thesis material...- I am betting on hardware 
solutions in the short run...)].

You also need to provide a reasonably reliable way for the memory to subsystem
connections to be made.  This is sort of hard hardware level engineering.  For
example, you probably can't afford the space for 32 VME buses...

Does anyone have any suggestions on how the connections into and out of such
memory subsystems could be made without a Cray-sized bundle of connectors?


On the topic of the original posting, what I have seen is that
micro based workstations are eating away fast at the minicomputer market, 
just on the basis of price performance, leaving only workstation clusters, 
vector machines (Convex-sized to Cray-sized), and other big iron, 
such as very large central storage servers.  So, I wouldn't write off 
big iron just yet, but obviously some companies will be selling a lot more
workstations and a lot fewer minicomputers than they were planning.


Quiz:  Why does Cray use *8* way interleaving per memory *port* on the
Cray Y-MP? 

  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)694-6117