🚀 go-pugleaf

I need help in finding a reference in the literature for a specific circuit.  I
am willing to trade a microprocessor system in exchange for this information
(see below).

Consider the following associative memory circuit:

----------------         -----           ----------------
|              | C       |   |           |              |
|              |---------|   |           |              |
|              |         |S  |           |              |
|              |         |E  |           |              |
|              |         |L L|           |              |
|     CAM      |         |E O|        RS |     RAM      |
|              |         |C G|-----------|              |
|    ARRAY     |         |T I|           |    ARRAY     |
|              |         |I C|           |              |
|              |         |O  |           |              |
|              | CS      |N  |           |              |
|              |---------|   |           |              |
|              |         |   |           |              |
----------------         -----           ----------------
                           |
                           S

Where:  C is the CAM coincidence line from the CAM
        CS is the CAM word select line from the CAM
        RS is the RAM word select line to the RAM
        S is the control line(s) to the selection logic

In operation, either the CAM coincidence line (C) or the CAM word select line
(CS) from the CAM is allowed to (at least logically) drive the RAM word select
line (RS), depending upon the state of the selection control line(s) (S).  This
is a very straightforward and simple concept.  Although the selection logic can
be anything from a simple electronic switch to a complex logic network, the
simpler the better.

I NEED TO FIND AN EARLY (prior to December 1983) PAPER WHICH REFERENCES THIS
CIRCUIT IN "THE PUBLISHED LITERATURE".

Acceptable sources include books, magazines, journals, defensive publications,
theses, proceedings, vendor-published and released hardware manuals, patents,
etc.  I prefer US documents but many foreign documents will be acceptable.  I
have been led to suspect that one of the early System 360's (e.g. /67, /85,
/95, or /195), with virtual memory and/or caches may have had such a
structure.  However, many other machines had associative TLM's and caches.

THE FIRST PERSON TO PROVIDE REFERENCE TO SUCH A DOCUMENT SHALL RECEIVE A
M68332EVS EVALUATION SYSTEM IN TRADE (including all hardware and software,
suitable for use with an PC or compatible).  I may be able to find satisfactory
trades for other non-duplicate documents which meet the above criteria.

An independent consultant, Jim Cox, has agreed to judge the submitted
articles to see if they meet the above guidelines.  Submit your documents
using the following procedure:

     1) photocopy the article but obliterate the source and date information

     2) include information on how to contact you, either by phone, email or
    	USmail

     3) FAX THE ARTICLE to Jim at (303) 444-9854

Either Jim or I will contact you for date and publication information after
his evaluation.  If the document and date are satisfactory, Jim will advise
me and arrange the trade.  DEADLINE FOR SUBMITTING A REFERENCE IS MIDNIGHT,
31 DECEMBER 1989.  If you have questions regarding this request, please
contact me at the email address below.

William C. Anderson
wca@emx.utexas.edu
-- 
William C. Anderson -- University of Texas Computation Center
wca@emx.utexas.edu   ..!ut-emx!wca