Article View: comp.arch
Article #2777Re: parallel systems
From: Lawrence Crowl
Date: Mon, 23 Oct 1989 15:21
Date: Mon, 23 Oct 1989 15:21
38 lines
2942 bytes
2942 bytes
In article <7651@bunny.GTE.COM> hhd0@GTE.COM (Horace Dediu) writes:
>Who cares about shared memory? Distributed is the only way to scale.
>Everybody realizes this since it can be proven. The only reason shared
>memory machines exist is because we don't yet know how to make good
>distributed machines. IMHO shared memory is a hack using available bus
>technology while waiting for the real parallel machines to come.
You are mixing two concepts --- memory architecture (as the processors see it)
and communication interconnect. Commonly available shared memory systems tend
to use a bus interconnect, so people assume that this is the only interconnect
for shared memory. This assumption is wrong. SHARED MEMORY DOES NOT IMPLY A
BUS INTERCONNECT. The BBN Butterfly, IBM RP3, and NYU Ultracomputer all
supported a shared memory implemented over an FFT interconnect without busses.
The Butterfly is commercially available with up to 512 processors. The RP3
is a research machine designed for as many as 512 processors, though I don't
know if IBM has configured one that large. I don't recall the Ultracomputer
size.
SHARED MEMORY IS SCALABLE. If the system supports a scalable interconnection,
and processors have local memory, then a shared memory system is scalable.
With local memory, only information that is truly shared need be communicated
between processors. This is exactly the information that must be communicated
on distributed memory system via message passing.
SHARED MEMORY IS DESIREABLE. The latency on remote memory access is typically
two orders of magnitured faster than message passing on distributed memory.
Applications with small messages performed on an infrequent bases will see
significant performance improvements. For instance, a shared memory system
can increment a shared counter far faster than any distributed memory system.
SHARED MEMORY HAS A COST. Implementing shared memory over a scalable
interconnect may require a larger aggregate bandwidth than that of distributed
memory systems.. I don't think there has been enough research here to know
the real tradeoff, but such a result would not suprise me.
--
Lawrence Crowl 716-275-9499 University of Rochester
crowl@cs.rochester.edu Computer Science Department
...!{allegra,decvax,rutgers}!rochester!crowl Rochester, New York, 14627
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!brutus.cs.uiuc.edu!wuarchive!udel!rochester!crowl From: crowl@cs.rochester.edu (Lawrence Crowl) Newsgroups: comp.arch Subject: Re: parallel systems Message-ID: <1989Oct23.152120.25967@cs.rochester.edu> Date: 23 Oct 89 15:21:20 GMT References: <35825@lll-winken.LLNL.GOV> <20336@princeton.Princeton.EDU> <7651@bunny.GTE.COM> Reply-To: crowl@snipe.cs.rochester.edu (Lawrence Crowl) Organization: University of Rochester Computer Science Department Lines: 38